1. Field of the Invention
The invention relates to artificial neurons and neural networks.
2. Description of the Related Art
Neural networks are still little used in industry in the absence of any viable technical solution, whether in terms of consumption or of development cost-performance ratio. When neural networks are used, they are implemented on the software level in a conventional computation architecture which performs a serial computation of the operations. Consequently, performance levels can, in large scale networks, be degraded because of the quantity of operations to be performed. Furthermore, the robustness of the system is weak in the event of failure of an element of the computation unit.
In order to construct more effective systems, efforts are now being made to draw on the biological principles by performing certain approximations on the model used to simulate living cells activity. This is what is leading in particular to the use of spiking neural networks.
The invention thus relates in particular to neuromorphic chips. The latter comprise analog or mixed neural networks and are likely to be used in artificial intelligence, for example in shape recognition devices. Neuromorphic chips comprise three parts: artificial neurons, synapses and memory elements which store the synaptic weight. Furthermore, the synaptic weights evolve during the learning period of the system by virtue of an algorithm which is implemented in another part of the system.
To this end, consideration has been given to store the information either by digital memory points, or by an analog memory consisting of a capacitor which voltage must be refreshed at the terminals or of a floating-gate transistor. These three solutions require a plasticity computation to be performed in another part of the system (as indicated above) and the result of the computation becomes the new value to be stored.
However, these solutions generate either a high current consumption, or a complexity of implementation, or even a lack of accuracy of the stored value.
To try to mitigate these drawbacks, the idea of using the new component called memristor, updated to this name in 2008, has been devised. This member comprises a non-volatile resistance which varies nonlinearly as a function of the applied voltage. When a voltage is applied to it, its resistance varies continuously and the device stores the resistance value once the voltage has disappeared. It therefore exhibits an intrinsic plasticity. This member can therefore behave as an artificial synapse. It has the advantage of being of very small size (a few hundreds of nanometers squared) and of consuming very little current since it is a passive element (a resistor) of several kilo ohms. This component therefore makes it possible to consider producing artificial neural networks of large dimensions. With spiking neural networks based on an architecture with analog circuits coupled to memristors, it becomes possible to envisage high-performance computation accelerators capable of performing heavy and complex tasks.
Nevertheless, the development of such systems is still in its infancy. The document “On spike-timing-dependent-plasticity, memristive devices, and building a self-learning visual cortex ,” C. Zamarreno-Ramos, L. A. Camunas-Mesa, J. A. Perez-Carrasco, T. Masquelier, T. Serrano-Gotarredona, and B. Linares-Barranco, Frontiers in Neuroscience, vol. 5, No. 00026, 2011, presents a solution for combining the spiking neural networks with memristors to produce exciting and inhibiting synapses. However, the solution described requires the design of the silicon neurons to be drastically modified to obtain the two types of synapses.